x86 amd: Fix after MSR cleanup

Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index 524a52f69da0081a77aca15aebe4f557f6082c3f..24e6c2da26d0301bb349807c07a6d55b5c15fea0 100644 (file)
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -243,8 +243,8 @@ static void disable_c1e(void *unused)
         * but we safely catch the #GP in that case.
         */
        if ((rdmsr_safe(MSR_K8_ENABLE_C1E, msr_content) == 0) &&
-           (msr_content & (3u << 27)) &&
-           (wrmsr_safe(MSR_K8_ENABLE_C1E, msr_content & ~(3u << 27)) != 0))
+           (msr_content & (3ULL << 27)) &&
+           (wrmsr_safe(MSR_K8_ENABLE_C1E, msr_content & ~(3ULL << 27)) != 0))
                printk(KERN_ERR "Failed to disable C1E on CPU#%u (%16"PRIx64")\n",
                       smp_processor_id(), msr_content);
 }